VESTA: A Secure and Efficient FHE-based Three-Party Vectorized Evaluation System for Tree Aggregation Models

Mar 10, 2025·
Haosong Zhao
,
JunHao Huang
Zihang Chen
Zihang Chen
,
Kunxiong Zhu
,
Donglong Chen
,
Zhuoran Ji
,
Hongyuan Liu
· 0 min read
Abstract
Machine Learning as a Service (MLaaS) platforms simplify the development of machine learning applications across multiple parties. However, the model owner, compute server, and client user may not trust each other, creating a need for privacy-preserving approaches that allow applications to run without revealing proprietary data. In this work, we focus on a widely used classical machine learning model – tree ensembles. While previous efforts have applied Fully Homomorphic Encryption (FHE) to this model, these solutions suffer from slow inference speeds and excessive memory consumption. To address these issues, we propose VESTA, which includes a compiler and a runtime to reduce tree evaluation time and memory usage. VESTA includes two key techniques, First, VESTA precomputes a portion of the expensive FHE operations at compile-time, improving inference speed. Second, VESTA uses a partitioning pass in its compiler to divide the ensemble model into sub-models, enabling task-level parallelism. Comprehensive evaluation shows that VESTA achieves a 2.1× speedup and reduces memory consumption by 59.4% compared to the state-of-the-art.
Type
Publication
In Proceedings of the ACM on Measurement and Analysis of Computing Systems, Volume 9, Issue 1
publications
Zihang Chen
Authors
Zihang Chen (he/him)
PhD student at HKUST(GZ)
Zihang Chen is a PhD student of microelectronics in The Hong Kong University of Science and Technology (Guangzhou). He received his bachelor degree of Computer Science and Technology from Nanjing University of Science and Technology in 2019. His research interests include computer architecture, micro-processor design, micro-architecture exploration, cuda programming and machine learning system. He used to be an intern at XiangShan group, Beijing Institute of Open Source Chip to develop high-performance RISC-V processor and implement some novel architectures on the simulators. Now, he is a third-year PhD student in The Hong Kong University of Science and Technology (Guangzhou), supervised by Prof. Jiayi Huang and Prof. Hongyuan Liu. Currently, he is a visiting student in Ghent University, supervised by Prof. Lieven Eeckhout.